Introduction to SoC
Security Fundamentals; SoC Security Tutorial
SoC Security Flow Chart
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SoC Security Flow Chart
Having learned about SoC security
Fundamentals, SoC Root of Trust and SoC chain of trust and Access
Protection in previous sections, let us try to establish
a SoC security Flow Steps.
- SoC Powers Up
- Securest software in ROM starts executing.
- ROM Firmware 'authenticates' the External Flash device, makes
sure it is interacting with genuine Flash device.
- ROM firmware then fetches the code from External Flash.
- The external Flash code is decrypted using either ROM firmware
itself or it uses some 'Hardware Accelerator' blocks on the SoC
to decrypt it.
- The decrypted code is then put in the system RAM, assuming no
XIP.
(Execute In Place)
- If XIP is required, then the code is decrypted in-line, 1
block at a time before execution.
- When the code copying is done into the RAM in case of No XIP,
the ROM code then jumps to RAM code.
- The code (either XIP or running from RAM) programs the MPU/SAU
(if MPU/SAU are used or opted in)
- The code (either XIP or running from RAM) programs the other
access protection hardware blocks on the SoC.
- The SoC is now secured.
- Application code starts execution on the secured SoC.
- Each application that runs on the SoC has now only limited
rights, in terms of what it can or can-not do.
This is the conclusion of basic SoC Security Fundamentals. The Next
Section takes the user to ARM Cortex-M Security Fundamentals. The first
chapter is on Privilege/Non-Privilege levels on ARM Cortex M0+,
M3/M4, M7.
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